Faulttolerance techniques for srambased fpgas request pdf. An adaptive method to tolerate soft errors in srambased fpgas. Several faulttolerant methods to tolerate seu effects have been proposed previously. However, fault tolerance techniques might introduce addi. Fault injection by hardware techniques in fpgas though the principles remain the same, the setups and. A low complexity method for detecting configuration upset. It starts by showing the model of the problem and the upset effects in the programmable architecture. Commercialgrade fpgas are potentially susceptible to permanently debilitating. Assessing scrubbing techniques for xilinx srambased.
Evolutionary based techniques for fault tolerant field programmable gate. Fis, a bitstream download can be affected by radiation effects, potentially leading to. Request pdf designing and testing faulttolerant techniques for srambased fpgas this paper discusses faulttolerant techniques for srambased fpgas. Fpgas must work reliably, and so methods of detection, diagnosis, and fault tolerance have been found to make sure that fpgas work when they are needed, the abundance of configurable logic elements and routing resources in recent fpgas provides a cost effective method for tolerating permanent faults in the system. Var ious techniques for fpga programming have been devised, of which the most prominent and current system is srambased fpgas. Soft error rate and fault tolerance techniques for fpgas. Srambased fpgas are sensitive to transient faults, so called soft errors, which. Triple modular redundancy is a widely used fault tolerance methodology to protect circuits against radiationinduced single event upsets implemented on srambased fpgas.
Pdf designing faulttolerant techniques for srambased fpgas. In this paper, we evaluate and compare scrubbing techniques for xilinx srambased fpgas with respect to radiationinduced single event upsets. Srambased fpgas, the state of connections in these routing devices is controlled by sram cells, which are. On the design of tunable fault tolerant circuits on sram. Srambased fpgas with an internal flash memory this type of fpga is generally like the previous, except that these chips contain internal flash memory blocks, thus eliminating the need to have an external nonvolatile memory. A new reconfigurable clockgating technique for low power. This paper discusses high level techniques for designing fault tolerant systems in srambased fpgas, without modification in the fpga architecture. Section 2 answers the question as to why srambased fpgas are so popular in space engineering and discusses radiation effects in space as well as their effects on srambased fpgas. Some presented techniques are based on developing a new faulttolerant architecture with new robustness fpga elements.
Sram based fpga fabrics and advantage on being able to reconfigure in microseconds vs. They often do not execute the scrubbing process in the right instant. There have been serious efforts to develop a viable, radiationhard srambased fpga. Systemc language reference manual was published early in 2012 iee12. Srambased fpgas include most chips of xilinx virtex and spartan families and altera stratix and cyclone. Criticalityaware scrubbing mechanism for srambased fpgas. Fpga, reconfigurable fault tolerance, singleevent upsets.
By fernanda lima kastensmidt, luigi carro and ricardo reis. A new fault injection approach to study the impact of. Columnbased precompiled configuration techniques for fpga fault tolerance weije huang and edward j. A new reconfigurable clockgating technique for low power srambased fpgas l. Mccluskey center for reliable computing department of electrical engineering stanford university, stanford, ca 94305. This technique combines duplication with comparison dwc and. Fpgas, without modifications in the fpga architecture, able. This article presents a fault tolerance technique for tra. Designing faulttolerant techniques for srambased fpgas. Faulttolerance in integrated circuits is no longer the exclusive concern of space designers or highlyreliable applications engineers.
Designing and testing faulttolerant techniques for sram. Faulttolerance techniques for srambased fpgas core. A read is counted each time someone views a publication summary such as the title, abstract, and list of authors, clicks on a figure, or views or downloads the fulltext. Other techniques are based on protecting the highlevel hardware description before the synthesis in the fpga.
Fault tolerance implementation within sram based fpga. Usually, their application has been restricted to offdetector, mostly due the sensitivity of srambased fpga to radiation faults single event upsets. Highspeed serial links implemented in srambased fpgas have been extensively used in the trigger and data acquisition systems of high energy physics experiments. In the sequence, it shows the main fault tolerance techniques used nowadays to protect integrated circuits against errors. These techniques are based on circuit level modifications with obvious modifications in the programmable architecture or. Inputoutput logic based faulttolerant design technique for srambased fpgas aditya srinivas timmaraju, deshmukh aniket anand, mohammed amir khan, zafar ali khan abstracteffects of radiation on electronic circuits used in extraterrestrial applications and radiation prone environments need to be corrected. Columnbased precompiled configuration techniques for. Faulttolerance techniques for srambased fpgas fernanda. Swift, consistency checks, software indications, and checkpointing. Request pdf faulttolerance techniques for srambased fpgas faulttolerance in integrated circuits is no longer the exclusive concern of space designers or highlyreliable applications engineers. Nmr techniques for srambased fpgas and power analysis.
A large set of methods for designing fault tolerance systems in srambased fpgas is described. Designing and testing faulttolerant techniques for srambased. This chapter will present a set of fault mitigation techniques for sram, flash and antifusebased fpgas and a test methodology to characterize those fpga under radiation. Traditional srambased fpgas, however, are highly sensitive to the ionizing radiation environment in space, making them prone to radiationinduced memory upsets. As the adverse effects of radiations in space are much higher than in the earth, developing fault tolerant techniques play crucial roles for the use of electronics in space. Abstractrecently, srambased fpgas are widely used in aeronautic and space systems. The text helps the reader choose the best techniques projectbyproject, and to compare fault tolerant techniques for. Srambased fpgas are highly attractive for space applications due to their inight recon gurability, decreased development time and cost, and increased design and testing exibility.
Experimental analysis performed on a realistic industrialtype case study demonstrates the efficiency of our methodology. Then, in section 3, terminology, failure modes, and mitigation techniques are outlined. Srambased field programmable gate arrays fpgas are programmable devices used for different applications, such as signal processing, prototyping and networking. This book discusses faulttolerance techniques for srambased field programmable gate arrays fpgas. Faulttolerance techniques for srambased fpgas, the. Fpgas and parallel architectures for aerospace applications soft errors and faulttolerant design. Soft error rate estimation and mitigation for srambased. Recovery time and fault tolerance improvement for circuits.
Designing fault tolerant systems into srambased fpgas. Comparing flash and srambased fpgas electronic products. Fault tolerance designing faulttolerant techniques for. Software fault tolerance methodology and testing for the embedded powerpc mark bucciero, john paul walters, and matthew french. The two main purposes of this book are to explore the key ideas in faulttolerant computer architecture and to present the current stateoftheart over approximately the past 10 years in academia and industry. The xilinx virtex5qv is the rst commercially available radiation hardened by design rhbd srambased fpga. Sterpone dipartimento di automatica e informatica politecnico di torino. In this paper, we propose an innovative design flow that allow the implementation of fault tolerance circuits in srambased fpga devices with different fault tolerance capability degrees. The software faulttolerance techniques used to protect the logic and routing of. Abstract the use of srambased field programmable gate arrays fpgas is becoming more and more prevalent in space applications.
The first possibility is to design a new fpga matrix composed of faulttolerant elements. Different fault tolerance techniques can be applied to fpgas according to their type of configuration technology, architecture and target operating environment. Fault tolerant design implementation on radiation hardened. Seu mitigation techniques for advanced reprogrammable. A novel design flow for fault tolerance srambased fpga systems springerlink. Triple modular redundancy tmr has been successfully applied in fpgas to mitigate transient faults, which are likely to occur in space applications. Evolutionary based techniques for fault tolerant field. Fault tolerance implementation within sram based fpga designs based upon single event upset occurrence rates to be presented by melanie berg at the 12th ieee international online testing symposium, grand hotel di como, lake of como, italy, july 1012,2006 2. Even though the flashbased fpgas have many integrated functions, such as is illustrated by the architectural diagram of the igl002 from microsemi see fig.
Introduction field programmable gate arrays fpgas are increasingly demanded by spacecraft electronic designers because of their high flexibility in achieving multiple requirements such as high performance, low nre nonrecurring engineering cost and fast turnaround time. Designing faulttolerant techniques for srambased fpgas article pdf available in ieee design and test of computers 21. Software fault tolerance methodology and testing for the. Evolutionary based techniques for fault tolerant field programmable gate arrays gregory v. Static random access memory sram based fpgas are now common in space based systems research such as that on the reconfigurable hardware in orbit rhino nasa aist03 project developed radiation hardening by software rhbsw techniques to mitigate single event upsets in commercial grade devices cots. Designing and testing faulttolerant techniques for srambased fpgas fernanda lima kastensmidt1 gustavo neuberger2 luigi carro2 ricardo reis2 1universidade estadual do rio grande do sul engenharia. First of all, the application of topological clock gating is not intrusive, since it is implemented without. Other ft techniques for srambased fpgas are discussed in 19, 20. The rapid adoption of fpgabased systems in space and avionics demands dependability rules from the design to the layout phases to protect against radiation effects. Radiation effects and fault tolerance techniques for fpgas and gpus. Mitigation of radiation effects in srambased fpgas for.
Faulttolerance techniques for srambased fpgas ebook. This article presents a fault tolerance technique for transient and permanent faults in srambased fpgas. A autonomous softerror tolerance of fpga configuration bits cfaed. Read faulttolerance techniques for srambased fpgas, the computer journal on deepdyve, the largest online rental service for scholarly research with thousands of academic publications available at your fingertips. Section 5 introduces a new highlevel technique for designing faulttolerant systems for srambased. Fault tolerant computer architecture synthesis lectures. Aging resilience and fault tolerance in runtime reconfigurable. In this book, we focus on the dependability challenge and the fault tolerance solutions that architects are developing to overcome it. However, selecting these techniques statically at design or compile time tends to be pessimistic and. Fpgas and parallel architectures for aerospace applications.
They can be handled through fault tolerance techniques like scrubbing and modular redundancy. However, the current scrubbing techniques execute without considering the criticality and timing of the user tasks implemented in the fpga. I had never knew flash based fpga fabrics really existed. A faulttolerant system for a srambased fpgas, must cope with the transient and permanent effects of an seu in the combinational logic, short and open circuits in the design connections, and bit. A generic methodology to compute design sensitivity to seu.
Fpgas have become prevalent in critical applications in which transient faults can seriously affect the circuits operation. This thesis is about managing srambased fpga faults at system level, in the context of. Sram based reprogrammable fpga tbr space applications. The presented method in 2 is an approach based on the tmr technique. Designing and testing faulttolerant techniques for srambased fpgas. This thesis is about managing srambased fpga faults at system level, in the.
The first step in algorithm 1 is the conversion of the ncd file to xilinx description. Responsibility fernanda kastensmidt, paolo rech, editors. There are two ways to implement faulttolerant circuits in srambased fpgas. Traditional srambased fpgas, however, are highly sensitive to the ionising radiation environment in space, making them prone to radiationinduced. Inputoutput logic based faulttolerant design technique. A novel design flow for fault tolerance srambased fpga. We introduce a new metric that allows a designer to precisely estimate and set the desired fault tolerance capabilities. Manuscripts should not exceed 5,000 words with each averagesize figure. A low complexity method for detecting configuration upset in sram based fpgas r. Seu mitigation techniques for advanced reprogrammable fpga in. This technique combines duplication with comparison.
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